A project entitled “A Drowsiness Warning System Using FPGA”, by Nguyen The Duc and Ho Van Chuong from the DTU Faculty of Electrical Engineering, earned an Excellent project award in the 2018 Asian Intel Innovative FPGA competition on July 15.
DTU students receive Certificates of Merit
The 2017 International Intel Innovate FPGA competition, sponsored by the American companies Intel and Terasic, specializes in embedded systems design. Students, engineers, lecturers and companies involved in embedded systems compete to exhibit their design skills. The contest, which began in December 2017, is divided into four regions, the Americas, Europe-Middle East-Africa, Greater China and Asia-Pacific, with one hundred projects submitted.
Nguyen The Duc and Ho Van Chuong developed their project using the Terasic DE10-Nano tools provided by the organizers, in conjunction with machine learning image processing technology and some SVM algorithms. When their system is installed in a car, a camera facing the driver takes facial images at five frames per second. Algorithms programmed into the system detect the frequency of eye-blinks and compare the rate with previous records. The system sounds a warning when it detects that the driver may be falling asleep, and the driver’s fatigue is recorded hour-by-hour to give an early warning and prevent accidents.
Nguyen The Duc, attaching his system to a car (above) and Ta Quoc Viet (standing) teach Nguyen The Duc and Ho Van Chuong how to conduct the project (below)
Duc said: "To complete our project, we applied what we had learned about microcontrollers and embedded systems to integrate different support tools to create a really stable and accurate system. DTU has provided us with the best facilities and equipment and we were very grateful to receive guidance from lecturer Tran Le Thang Dong and engineer Ta Quoc Viet."
(Media Center)